Metal-oxide-semiconductor (MOS) transistors provide a basic building block that is employed in a wide variety of integrated circuit applications. The increase in MOS transistor densities, due to their shrinking footprint, have allowed their use in a broad spectrum of integrated circuits and systems. Many current integrated circuit applications employ a multitude of different MOS transistor types. For example, in addition to the core type of MOS transistors found on the substrate of a given integrated circuit, other high performance and low performance types may also be found on the substrate of the integrated circuit. Present MOS transistor design rules often employ multiple, if not varying, threshold voltages to trade-off the power versus performance for the different types of MOS transistors found in a given integrated circuit.
Currently, the different threshold voltages are achieved using a collection of additional reticles and associated etch/implant processes designed to vary one of the many parameters tied directly to a transistors threshold voltage. For example, the collection of additional reticles and associated etch/implant processes are designed to adjust, among others, a MOS transistors' gate length, gate oxide thickness and type, source/drain dopant profile and channel, to tailor a MOS transistors' threshold voltage. In addition to tailoring the threshold voltage for the different types of MOS transistors, the n-type and p-type MOS transistors of a given type in a standard complementary MOS transistor flow must also be tailored. Unfortunately, the different threshold voltages required in a given integrated circuit, whether complimentary MOS transistors of the same type or different types of MOS transistors, are often difficult and costly to achieve.
Accordingly, what is needed in the art is a method for easily and inexpensively manufacturing MOS transistors having varying threshold voltages without experiencing the drawbacks of the prior art methods.